Summer Workshop on VHDL Programming
4th - 5th July 2018
The Department of ECE & EEE, Dronacharya Group of Institutions, Greater Noida successfully organized the Two Days Summer Workshop on VHDL Programming on 4th & 5th July 2018 at DGI campus. This workshop was conducted in association with DGI- Institution of Electronics & Telecommunication Engineers (IETE) Student Chapter. Ms. Payal Garg, Assistant Professor, Department of ECE was the coordinator and instructor for this workshop.
The workshop started with the motivational address by Hon'ble Director, Prof. (Dr.) Ashish Soti on 4th July 2018. He advised the participants to remain attentive and focused during the workshop. He said that it is important for students to get well versed with such useful software which are relevant in industries.
Ms. Payal Garg began the session with the introduction of VHDL (VHSIC Hardware Description Language). She said that VHDL is a hardware description language used in electronic design automation to describe digital and mixed-signal systems such as Field-Programmable Gate Arrays (FPGA) and Integrated Circuits (IC). VHDL can also be used as a general purpose parallel programming language. The programming is done on Xilinx ISE Tool (Integrated Software Environment).
During the pre-lunch session, participants learnt the basics of VHDL, its key features and characteristics. In the later half, they were demonstrated the methodology to work with the Xilinx ISE tool by implementing basic examples of Half Adder, Full Adder, Half Subtractor and Full Subtractor. Participants simulated the design on tool and implemented different modelling techniques as well.
Ms. Garg started the second day's session with the description of test-bench codes, followed by different concurrent and sequential statements. Participants then designed some more codes for Multiplexers, Demultiplexers, Encoders and Decoders using different modeling techniques.
On successful completion of this workshop, the participants seemed confident enough to:
- Design different models with various levels of complexity
- Simulate their design and debug, if required
- Use Xilinx for various project development
Prof. Probeer Sahw, HOD, Department of ECE & EEE appreciated the participants for their enthusiastic participation. He thanked Ms. Garg for conducting the workshop.