QEEE D2S Session on “Digital VLSI”
(17th, 24th & 26th October, 2017)
Quality Enhancement in Engineering Education (QEEE) D2S session on “Digital VLSI” was conducted at Dronacharya Group of Institutions, Greater Noida by IIT, Madras under the initiative of learning through Information and Communication Technology (I.C.T). The event was scheduled for 3 days i.e. 17th October; 24th October and 26th October 2017 for B. Tech IV-year ECE students. Prof. Deleep Nair (IIT, Madras) conducted the sessionand. Prity Yadav (Assistant Professor, Department of ECE) coordinated the program.
Day 1: 17-Oct-2017
Prof. Deleep Nair explained MOS Transistor and its basic operations (accumulation, depletion and inversion). Prof. Nair then explained MOS Capacitor and MOS Energy Band Diagram operations. He also focused on the Voltage Drop in the MOS System. While discussing MOS Band Diagram at threshold, he clarified why bias is applied in the Band Diagram. The session focused on the basic concept of MOS Transistor and Energy Band Diagram.
Day 2: 24- Oct- 2017
Prof.Deleep Nairstarted the session with the basics of MOS Capacitor and its operating regions. He discussed MOS Transistor and compared it with the MOS Capacitor. Prof. Nair alsoexplained NMOS transistor, its operations and characteristics. He elaborated on NMOS transistor in detail along with operating regions like linear, cutoff and saturation. He then focused his discussion on drain current and its equations.
Day 3: 26-Oct-2017
The third session started with the lecture on ‘Body Effect’. Prof. Nair discussed Body effect in NAND and NOR (Universal Gates). He also discussed advantages of MOSFET and compared MOS and BJT. He defined ‘MOS Scaling’ and ‘Scaling Rule of Thumb’. He explained Sub Threshold Swing and NMOS Energy Band Profile as well as the Short Channel and Long Channel effects.
Prof. Nairconcluded the session with a discussion on ‘Single Gate’ and ‘Double Gate’ concept and their advantages.